The present disclosure relates to the use of a first curable resin composition in combination with a second curable fluxing resin composition in underfill materials. More specifically, the first curable resin composition includes a thermosetting resin, solvent and functionalized colloidal silica. The second curable fluxing resin composition preferably includes a thermosetting epoxy resin and optional additives. The final cured composition has a low coefficient of thermal expansion and a high glass transition temperature.
Demand for smaller and more sophisticated electronic devices continues to drive the electronic industry towards improved integrated circuit packages that are capable of supporting higher input/output (I/O) density as well as have enhanced performance at smaller die areas. While flip chip technology has been developed to respond to these demanding requirements, a weak point of the flip chip construction is the significant mechanical stress experienced by solder bumps during thermal cycling due to the coefficient of thermal expansion (CTE) mismatch between silicon die and substrate. This mismatch, in turn, causes mechanical and electrical failures of the electronic devices. Currently, capillary underfill is used to fill gaps between silicon chip and substrate and improve the fatigue life of solder bumps; however capillary underfill based fabrication processes introduce additional steps into the chip assembly process that reduce productivity.
Ideally, underfill resins would be applied at the wafer stage to eliminate manufacturing inefficiencies associated with capillary underfill. However, use of resins containing conventional fused silica fillers needed for low CTE is problematic because fused silica fillers obscure guide marks used for wafer dicing and also interfere with the formation of good electrical connections during solder reflow operations. Thus, in some applications improved transparency is needed to enable efficient dicing of a wafer to which underfill materials have been applied.
Moreover, a problem with the application of underfill resins at the wafer stage is the misalignment of chips which can occur after chip placement on a substrate. Without a means for holding a chip in place on a substrate or device, the chips can shift during the reflow operation and become misaligned. This misalignment is especially prevalent during transport operations of chip assemblies.
Thus, improved underfill materials having low CTE and improved transparency which are capable of reducing chip misalignment, and methods of their application, would be desirable.